Computer Organization

Boolean Logic

Boolean logic is the foundation of all digital computing. Every decision a computer makes is expressed as a combination of Boolean operations on binary values (0 = false, 1 = true).

Basic Logic Operations and Truth Tables

NOT — inverts a single input:

A	NOT A
0	1
1	0

AND — output is 1 only when both inputs are 1:

A	B	A AND B
0	0	0
0	1	0
1	0	0
1	1	1

OR — output is 1 when at least one input is 1:

A	B	A OR B
0	0	0
0	1	1
1	0	1
1	1	1

XOR (Exclusive OR) — output is 1 when inputs differ (exactly one is 1):

A	B	A XOR B
0	0	0
0	1	1
1	0	1
1	1	0

NAND — NOT AND; output is 0 only when both inputs are 1:

A	B	A NAND B
0	0	1
0	1	1
1	0	1
1	1	0

NOR — NOT OR; output is 1 only when both inputs are 0:

A	B	A NOR B
0	0	1
0	1	0
1	0	0
1	1	0

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Logic Gates

A logic gate is a physical electronic circuit that implements a Boolean operation. Gates take binary inputs (voltage high = 1, voltage low = 0) and produce a binary output. Digital circuits are built by connecting gates together.

Gate Symbols (described)

Each gate has a standardised symbol used in circuit diagrams:

Gate	Symbol description	IEC symbol
NOT	Triangle with a small circle (bubble) at the output	Labelled “1” with output bubble
AND	D-shaped body (flat input side, curved output side)	Labelled ”&“
OR	Curved input and output sides (shield shape)	Labelled “≥1”
XOR	Same as OR but with an extra curved line on the input side	Labelled “=1”
NAND	AND symbol with a bubble at the output	”&” with output bubble
NOR	OR symbol with a bubble at the output	”≥1” with output bubble

Combining Gates

Gates are combined to build more complex logic. The output of one gate feeds into the input of another.

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Operating Systems

The operating system (OS) is system software that acts as an intermediary between the hardware and user applications. It manages all hardware resources and provides services to application programs.

OS Functions

Function	Description
Memory management	Allocates RAM to running processes; handles virtual memory (using secondary storage as an extension of RAM) and paging to prevent processes from interfering with each other
File management	Organises files in a hierarchical directory structure; controls read, write, and execute permissions for files and folders
Peripheral management	Communicates with input/output devices (printers, keyboards, screens) through device drivers; manages I/O queues
Multitasking	Allows multiple processes to run concurrently by rapidly switching CPU time between them (time-slicing); uses scheduling algorithms (e.g., round-robin) to allocate CPU time fairly
Security	Manages user authentication (login); enforces access control lists to determine which users can access which resources; maintains system logs for audit purposes

User Interface Types

The OS provides a user interface — the means by which users interact with the computer:

• GUI (Graphical User Interface) — windows, icons, menus, pointer (WIMP). Intuitive for non-technical users; requires more processing power and memory.
• CLI (Command-Line Interface) — text-based commands typed by the user. Precise, efficient for experienced users; requires knowledge of command syntax; uses less memory than a GUI.

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System Software vs Application Software

All software falls into one of two broad categories.

System Software

System software manages and controls the hardware, providing a platform for application software to run. It operates largely in the background, invisible to most users.

Examples: operating system, device drivers, utilities (disk defragmenter, antivirus, file compression), programming language compilers and interpreters.

Application Software

Application software is designed to perform specific tasks for end users. It depends on system software to access hardware.

Examples: word processors, web browsers, spreadsheets, games, email clients, ERP systems, graphic design tools.

Attribute	System Software	Application Software
Purpose	Manages hardware and provides platform	Performs user tasks
User interaction	Mostly background	Direct user interaction
Examples	OS, drivers, compilers	Word processor, browser, game
Dependency	Runs on hardware directly	Requires OS to function

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CPU Architecture

The Central Processing Unit (CPU) is the component that executes program instructions. It consists of three main sub-units, connected internally and to the rest of the computer via a set of electrical pathways called buses.

The Von Neumann Architecture

The von Neumann architecture (also called the stored-program concept) is the foundation of modern computers. Key features:

• Single shared memory stores both data and instructions (not in separate memories)
• Instructions are fetched and executed sequentially (one at a time)
• The CPU contains: ALU, CU, registers, and connects to memory via buses

ALU, Control Unit, and Registers

Component	Full Name	Function
ALU	Arithmetic Logic Unit	Performs arithmetic (add, subtract, multiply) and logical (AND, OR, NOT, XOR, compare) operations
CU	Control Unit	Fetches instructions from memory, decodes them, and coordinates execution across the CPU
Registers	—	Ultra-fast temporary storage locations inside the CPU; each has a specific role

Key Registers

Register	Name	Role
PC	Program Counter	Holds the memory address of the next instruction to be fetched
IR	Instruction Register	Holds the current instruction being decoded and executed
MAR	Memory Address Register	Holds the memory address the CPU wants to read from or write to
MDR	Memory Data Register	Holds the data just read from memory or about to be written to memory
ACC	Accumulator	General-purpose register storing the result of ALU operations

System Buses

The CPU communicates with memory and I/O devices through three buses:

Bus	Direction	Carries
Address bus	CPU → memory / I/O (one-way)	The memory address to be accessed
Data bus	Bidirectional	The actual data or instruction being transferred
Control bus	Bidirectional	Control signals (read/write, clock, interrupt, reset)

The clock generates a regular pulse that synchronises all CPU operations. Clock speed is measured in GHz (gigahertz); more pulses per second means more instructions can be executed per second. However, more cores, cache size, and instruction set efficiency also affect overall performance.

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Memory Hierarchy

Memory is organised in a hierarchy from fastest/smallest/most expensive to slowest/largest/cheapest.

The memory hierarchy from fastest to slowest is: Registers → Cache → RAM → Secondary Storage

Level	Speed	Capacity	Cost per GB	Volatile?
Registers	Fastest	Bytes	Very high	Yes
Cache (L1/L2/L3)	Very fast	KB – MB	High	Yes
RAM	Fast	GB	Moderate	Yes
SSD	Moderate	GB – TB	Low-moderate	No
HDD	Slow	GB – TB	Low	No
Optical / USB	Slow	GB	Very low	No

Why the hierarchy exists: Faster memory is physically more expensive to manufacture. The CPU uses a small amount of very fast memory (registers and cache) for immediate work, backed by larger but slower RAM for active programs, and even larger secondary storage for persistent data.

Cache Memory

Cache is a small, very fast volatile memory that sits between the CPU and RAM. When the CPU needs data, it checks the cache first (cache hit). If not found (cache miss), it retrieves from RAM and stores a copy in cache for future use.

• L1 cache — smallest and fastest; inside the CPU core
• L2 cache — larger, slightly slower; often still inside the CPU
• L3 cache — largest, shared between cores

Secondary Storage

Secondary storage is non-volatile and retains data when power is removed. It is used for long-term storage of files, programs, and the operating system.

Type	Technology	Typical Use	Advantage	Disadvantage
HDD	Magnetic spinning platters	Bulk data storage, OS	Low cost per GB, large capacity	Mechanical parts = slower, fragile if dropped
SSD	NAND flash (no moving parts)	OS drive, fast applications	Fast access, silent, durable	More expensive per GB than HDD
Optical (CD/DVD/Blu-ray)	Laser reads/writes pits on disc	Distribution, archiving	Cheap per disc, long shelf life	Slow, low capacity, easily scratched
USB Flash	NAND flash	Portable transfer	Compact and portable	Small capacity vs. HDD, wears out over many writes

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The Fetch-Execute Cycle

The CPU continuously repeats a three-stage cycle to process instructions stored in RAM. Each iteration processes one instruction.

The Three Stages

1. Fetch

• The address stored in the PC is copied to the MAR
• The instruction at that memory address is retrieved and placed in the MDR
• The instruction is copied from MDR to the IR
• The PC is incremented to point to the next instruction

2. Decode

• The Control Unit interprets the binary instruction held in the IR
• It identifies the operation type (load, store, add, jump, etc.) and any operands

3. Execute

• The CU activates the appropriate hardware:
  • If arithmetic/logic: data is sent to the ALU; result stored in ACC
  • If memory read: MAR gets the data address; data arrives in MDR, then moves to ACC or a register
  • If memory write: data from ACC is placed in MDR; MAR holds the destination address; write signal sent
  • If jump: PC is updated to the jump target address instead of incrementing

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Binary and Hexadecimal Representation

All data and instructions inside a computer are stored and processed in binary — patterns of 0s and 1s (bits). Hexadecimal (base 16) is used as a compact human-readable shorthand for binary.

Unsigned Binary

Each bit position represents a power of 2, from $2^0$ (rightmost) upward.

8-bit place values:

$128 \quad 64 \quad 32 \quad 16 \quad 8 \quad 4 \quad 2 \quad 1$

Hexadecimal

Hexadecimal uses base 16, with digits 0–9 and A–F (where A = 10, B = 11, C = 12, D = 13, E = 14, F = 15). One hex digit represents exactly 4 binary bits (a nibble), making hex a compact notation for binary.

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Two’s Complement

Two’s complement is the standard method computers use to represent negative integers in binary.

Representing Negative Numbers

For an $n$-bit two’s complement system:

• Positive numbers: represented normally in binary (leading bit = 0)
• Negative numbers: the most significant bit (MSB) has a negative place value of $-2^{n-1}$
• Range for $n$ bits: $-2^{n-1}$ to $+2^{n-1} - 1$

For 8-bit two’s complement: range is $-128$ to $+127$.

Converting a Positive Integer to Its Negative Two’s Complement

Method: invert all bits, then add 1

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Logical Operations

The ALU performs logical (Boolean) operations on binary values. These operations work bit by bit across corresponding bit positions.

Truth Tables

A	B	AND	OR	XOR
0	0	0	0	0
0	1	0	1	1
1	0	0	1	1
1	1	1	1	0

A	NOT A
0	1
1	0

Bit Manipulation with Logical Operations

Logical operations are used to manipulate specific bits within a byte:

• AND with a mask — used to clear (force to 0) specific bits. Apply mask with 0 where you want to clear.
• OR with a mask — used to set (force to 1) specific bits. Apply mask with 1 where you want to set.
• XOR with a mask — used to toggle specific bits. Apply mask with 1 where you want to flip.

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Machine Instruction Concepts

A machine instruction is a binary-encoded command that the CPU can execute directly. Students do not need to learn a full assembly language, but should understand the concept.

Every machine instruction consists of:

• Opcode — specifies the operation (e.g., LOAD, STORE, ADD, JUMP)
• Operand — specifies the data or memory address involved

Common instruction types:

• Data transfer: LOAD (memory → register), STORE (register → memory)
• Arithmetic: ADD, SUBTRACT
• Logical: AND, OR, NOT
• Branch/Jump: unconditional jump (always jump to address), conditional jump (jump if result = 0, etc.)
• Halt: stop execution

Programs stored in memory as binary machine code are fetched and executed by the CPU one instruction at a time via the fetch-decode-execute cycle.

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HL Transistors and Boolean Algebra

Transistors

A transistor is the fundamental electronic switch used to build logic gates. A transistor has three terminals: the base (or gate in a MOSFET), collector, and emitter.

• When the base receives a sufficient voltage (logic 1), the transistor switches on — current flows from collector to emitter (output = 1 for certain configurations).
• When the base receives no voltage (logic 0), the transistor switches off — no current flows (output = 0).

A NOT gate uses a single transistor: when the input is high (1), the transistor pulls the output low (0); when the input is low (0), the output is high (1). A NAND gate uses two transistors in series; a NOR gate uses two transistors in parallel.

Modern CPUs contain billions of transistors fabricated at the nanometre scale, enabling the density and speed of contemporary processors.

Boolean Algebra Simplification

Boolean algebra provides algebraic rules to simplify logic expressions, reducing the number of gates needed in a circuit.

Key laws:

Law	Expression
Identity	$A \text{ AND } 1 = A$ ; $A \text{ OR } 0 = A$
Null	$A \text{ AND } 0 = 0$ ; $A \text{ OR } 1 = 1$
Idempotent	$A \text{ AND } A = A$ ; $A \text{ OR } A = A$
Complement	$A \text{ AND NOT}(A) = 0$ ; $A \text{ OR NOT}(A) = 1$
De Morgan’s (1)	$\text{NOT}(A \text{ AND } B) = \text{NOT}(A) \text{ OR } \text{NOT}(B)$
De Morgan’s (2)	$\text{NOT}(A \text{ OR } B) = \text{NOT}(A) \text{ AND } \text{NOT}(B)$
Double negation	$\text{NOT}(\text{NOT}(A)) = A$

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Practice Questions

Q1 — Complete the truth table for a NOR gate with inputs A and B. [2 marks]

Model answer:

A	B	A NOR B
0	0	1
0	1	0
1	0	0
1	1	0

Award 1 mark for the first row (0,0 → 1) and 1 mark for the remaining three rows all correct.

Q2 — State two differences between system software and application software. [4 marks]

Model answer:

Difference 1: System software manages hardware and provides a platform for other software to run (1 mark), whereas application software performs specific tasks directly for end users (1 mark).

Difference 2: System software runs mostly in the background, often without direct user interaction (1 mark), whereas application software is the software the user directly opens and uses (1 mark).

Q3 — Describe how an operating system manages multitasking on a single-core CPU. [3 marks]

Model answer:

The OS uses a scheduling algorithm (such as round-robin) to allocate CPU time to processes in turn (1 mark). The CPU rapidly switches between processes — each receives a short time slice before control passes to the next process (1 mark). This switching is fast enough that users perceive all processes as running simultaneously, even though the CPU executes only one process at a time (1 mark).

Q4 — State the function of the MAR and MDR during a memory read operation. [4 marks]

Model answer:

The MAR (Memory Address Register) holds the memory address that the CPU wishes to read from (1 mark). The MDR (Memory Data Register) holds the data retrieved from that memory address (1 mark). During a read, the CU copies the required address into the MAR (1 mark); the memory system then places the data at that address into the MDR for the CPU to use (1 mark).

Q5 — Convert the binary number 01101001 to decimal and to hexadecimal. [4 marks]

Model answer:

Binary to decimal:

$0+64+32+0+8+0+0+1 = 105$ (2 marks: 1 for correct working, 1 for 105)

Binary to hex:

Split into nibbles: 0110 1001

0110 = 6, 1001 = 9

Hexadecimal = 69 (2 marks: 1 for correct split, 1 for 69)

Q6 — Find the 8-bit two’s complement representation of −23. Show all working. [3 marks]

Model answer:

Step 1 — Write +23 in 8-bit binary: 00010111 (1 mark)

Step 2 — Invert all bits: 11101000 (1 mark)

Step 3 — Add 1: 11101001 (1 mark)

Answer: 11101001

Q7 — State the range of values that can be stored in a 4-bit two’s complement system. [2 marks]

Model answer:

Minimum: $-2^3 = -8$ (1 mark)

Maximum: $+2^3 - 1 = +7$ (1 mark)

Range: −8 to +7

Q8 — Trace the fetch-decode-execute cycle for the instruction STORE 300, where the accumulator currently holds the value 42 and the PC contains 105. [4 marks]

Model answer:

Fetch: MAR ← 105; MDR ← instruction STORE 300; IR ← STORE 300; PC ← 106 (1 mark)

Decode: CU identifies a memory-write instruction; operand address = 300 (1 mark)

Execute: MAR ← 300 (1 mark); MDR ← 42 (value from ACC) (1 mark); write signal sent; value 42 is written to memory address 300

Q9 — A byte has the value 10101100. Apply an OR operation with mask 00001111. State the result and explain what this operation achieves. [3 marks]

Model answer:

10101100 OR 00001111 = 10101111 (1 mark)

The OR operation sets bits 0–3 (the lower nibble) to 1 (1 mark), while leaving the upper four bits unchanged (1 mark).

Q10 (HL) — Apply De Morgan’s law to simplify NOT(A OR B) and verify using a truth table. [4 marks]

Model answer:

By De Morgan’s second law: NOT(A OR B) = NOT(A) AND NOT(B) (1 mark)

Verification truth table:

A	B	A OR B	NOT(A OR B)	NOT(A)	NOT(B)	NOT(A) AND NOT(B)
0	0	0	1	1	1	1
0	1	1	0	1	0	0
1	0	1	0	0	1	0
1	1	1	0	0	0	0

All four rows of NOT(A OR B) match NOT(A) AND NOT(B) (3 marks: 1 per correct pair of equivalent columns verified, up to 3).